楂樻€ц兘RISC CPU
閲囩敤RISC 鏋舵(g貌u)锛屽儏鏈�37 姊濆柈鎸囦护
锛堥櫎绋嬪簭璺宠綁(zhu菐n)鎸囦护澶栫殑鎵€鏈夊叾浠栨寚浠ら兘鏄柈鍛ㄦ湡鎸囦护,绋嬪簭璺宠綁(zhu菐n)鎸囦护鏄洐鍛ㄦ湡鎸囦护锛�
8 绱氭繁鐨勭‖浠跺爢妫�
14 浣嶅鎸囦护闆�, 8 浣嶅鐨勬暩(sh霉)鎿�(j霉)璺緫
OTP 鑺墖锛岀墖鍏�(n猫i)闁冨瓨锛圧OM锛夌偤2K 瀛楋紝鏁�(sh霉)鎿�(j霉)瀛樺劜锛圧AM锛夌偤128 瀛楃瘈(ji茅)
鏁�(sh霉)鎿�(j霉)鍜屾寚浠ょ殑鐩存帴銆侀枔鎺ュ拰鐩稿皪灏嬪潃妯″紡
PA-5 閫氶亷杌熶欢鐛ㄧ珛瑷�(sh猫)缃収(n猫i)閮ㄤ笂鎷�
PC0-7 閫氶亷杌熶欢鐛ㄧ珛瑷�(sh猫)缃収(n猫i)閮ㄤ笂鎷�
PA0-2銆�4銆�5 & PC0-1 鍏锋湁杓稿嚭闁嬫紡鍔熻兘
宸ヤ綔闆诲2.0V 鍒�5.5V
鏈夊彲閬搁浕婧愪綆澹撴娓�锛屾瑺澹撳京(f霉)浣嶅姛鑳斤紙PED锛夛紝涓夌礆娆犲寰�(f霉)浣�
鏈�7 閫氶亾10 浣岮D 鍜�12 浣岮D 鍙伕锛屽付鍏�(n猫i)閮ㄥ熀婧�(zh菙n)1.25V,鍏�(n猫i)閮ㄥ弮鑰�2V/3V
瀹氭檪鍣�0锛氬付3Bit 闋�(y霉)鍒嗛牷鍣�8Bit 瀹氭檪鍣�
瀹氭檪鍣�1锛氬付2Bit 闋�(y霉)鍒嗛牷鍣�16Bit 瀹氭檪鍣�
瀹氭檪鍣�2锛氬付PWM0 鐨�12Bit 瀹氭檪鍣�
瀹氭檪鍣�3锛氬付PWM1 鐨�12Bit 瀹氭檪鍣�
鍏╄矾PWM锛歅WM0锛堝彲杌熶欢閬稿紩鑵砅A2/PC4锛�,PWM1锛堝彲杌熶欢閬稿紩鑵砅A1/PC5锛�
鑷尟寮忕湅闁€鐙楀畾鏅傚櫒
14 鍊嬪彲鐛ㄧ珛鐩存帴鎺у埗I/O 鍙�
宸ヤ綔閫熷害锛氬収(n猫i)閮�16M to 32KHz 鎸暕鍣紝鍙伕4 鍒嗛牷/2 鍒嗛牷宸ヤ綔鍛ㄦ湡
9鍊嬩腑鏂锋簮锛�5鍊嬪収(n猫i)閮ㄤ腑鏂锋簮: TM0銆乀M1銆乀M2銆乀M3銆丄DC
4鍊嬪閮ㄤ腑鏂锋簮锛歅A2銆丳C2銆丳C3鍜孭A0-5 寮曡叧璁婂寲